Generally speaking, field effect transistors can be divided into depletion type and enhancement type. Depletion field effect transistor (d-fet) is a kind of FET which has channel and can conduct electricity when gate bias is 0; Enhanced field effect transistor (E-FET) is a kind of FET which has no channel and can't conduct electricity at zero gate bias. These two types of FET have their own characteristics and uses. Generally, enhanced FETs are valuable in high-speed and low-power circuits; When the device works, the polarity of gate bias voltage is the same as that of drain voltage, so it is more convenient in circuit design.

The so-called enhanced mode refers to: when VGS = 0, the tube is in the cut-off state. After adding the correct VGS, most carriers are attracted to the gate, thus "enhancing" the carriers in the region and forming a conductive channel. The n-channel enhanced MOSFET is basically a left-right symmetrical topology. It generates a layer of SiO2 thin film insulation layer on the p-type semiconductor, then diffuses two highly doped n-type regions by photolithography process, and leads out the electrode from the n-type region, one is the drain D, the other is the source s. A layer of metal aluminum is plated on the insulating layer between the source and the drain as the gate G.

When VGS = 0 V, there are two back-to-back diodes between the drain and the source. Adding voltage between D and s will not form current between D and s. When the voltage is applied to the gate, if 0 ＜ VGS ＜ VGS (th), a thin depletion layer of negative ions is formed by the action of capacitive electric field formed between the gate and the substrate, which repels the multi carrier holes in the p-type semiconductor near the gate downward; At the same time, the minority carrier will be attracted to the surface, but the number is limited, which is not enough to form a conductive channel to connect the drain and the source, so it is still not enough to form a drain current ID.

Further increasing VGS, when VGS > VGS (th) (VGS (th) is called on voltage), because the gate voltage is already strong at this time, more electrons are gathered in the surface layer of p-type semiconductor near the gate, which can form a channel to connect the drain and source. If the drain source voltage is applied at this time, the drain current ID can be formed. The electrons in the conductive channel formed under the gate are called the inversion layer because they are opposite to the carrier hole polarity of p-type semiconductor. As VGS continues to grow, IDS will continue to grow. When VGS = 0V, id = 0, only when VGS > VGS (th), the drain current will appear. Therefore, this kind of MOS transistor is called enhanced MOS transistor.

The curve id = f (VGS (th)) | VDS = const can be used to describe the control relationship between VGS and drain current, which is called transfer characteristic curve. The slope GM of transfer characteristic curve reflects the control effect of gate source voltage on drain current. The dimension of GM is MA / V, so GM is also called transconductance.